SPL 2007 Paper Submission
Authors are invited to submit original and unpublished contributions as 6 page papers to be considered as regular papers.
The page limit includes tables, figures and references. All contributions must be submitted electronically in PDF format.
The official language of the conference is English.
The guidelines and templates for formatting papers can be downloaded here (IEEE format).
SPL 2007 organization is pleasured to announce the IEEE Circuits and Systems Society (CAS) technical co-sponsorship. Accepted papers will appear in the IEEE Xplore electronic library, which provides excellent visibility and accessibility to its contents. SPL 2007 has been assigned the following numbers:
IEEE Catalog Number: 07EX1511
ISBN: 1-4244-0606-4
Library of Congress: 2006931377
Designer Forum
The goal of the Designer Forum is to give exposure to ongoing researches, academic experiences, and industrial designs in order to get feedback from experienced researchers and industrial partners. The accepted contributions to the Design Forum will not be included in the IEEE Database and SPL proceeding book. They will be published in a separate Designer Forum proceeding book, and these contributions will be presented in special poster sessions during the conference. Due to the regional scope of the Designer Forum, its papers can be written also in Spanish and Portuguese languages.
Authors interested in contributing to the Designer Forum, are invited to submit 4-page papers . The guidelines and templates for formatting papers can be downloaded here (IEEE format).
Important Dates:
Extended Deadline:
Notification of Acceptance:
Final version Deadline:
Early Registration:
October 31, 2006
December 7, 2006
December 21, 2006
December 27, 2006
Conference Topics
The Program Committee cordially invites you to participate and submit your contribution to SPL 2007. The conference topics are within the scope of field programmable logic and its applications. A non exclusive list of themes is:
Design Methodology
Low-Power Design
High-speed Techniques
Reconfiguration
Fault Tolerant Systems
Test Techniques
Failure Analysis and Reliability
Noise, Radiation Effects
and EMC
Biologically inspired systems
Physical Design
Synchronization and
Seft-timed SystemsFPGA in Education
Educational Experiences
Laboratory MaterialsPlatform-based design
Embedded Processors
Custom Computers
IP Cores
Java, Handel-C, System-C
Hardware/Software Co-design
BenchmarkingApplications
Robotics
Telecommunications
Adaptable Systems
Artificial vision
CryptographySignal Processing
Computer Arithmetics
Custom DSPs
Digital Signal Processing
Software RadioEDA Tools
Logic and Architectural
Synthesis
Modelling and Simulation
Emulation
Optimization
Technology mapping
System-level partitioning
Formal Methods in
System Design