SPL News...

 

Welcome to SPL 2008!

SPL is the austral meeting point for researchers interested on FPGA technology. The 4th SPL continues the tradition of the previous editions and will be hosted by the INVAP SE , Bariloche, Argentine Patagonia, from March 26-28, 2008.

SPL 2008 organization is pleasured to announce the IEEE Circuits and Systems Society (CAS) technical co-sponsorship. Accepted papers will appear in the IEEE Xplore electronic library, which provides excellent visibility and accessibility to its contents.

The conference takes place in beautiful San Carlos de Bariloche, a 100 thousand inhabitants city in the province of Río Negro, Argentine Patagonia, situated on the foothills of the Andes. Surrounded by lakes and mountains, it is famous for skiing but also great for sight-seeing, water sports, trekking and climbing.

Special Issue of IJRC

IJRC (ISSN: 1687-7195): Editors will select a number of papers from the SPL 08 conference and the authors of these papers will be invited to submit an extended version.

Special Track on Aerospace Applications

In this edition, SPL will extend its scope to new developments on programmable logic devices and technologies for aerospace applications such as flight, fault tolerance, reliability, and radiation susceptibility. There will be special sessions dedicated to this topic. In this way, the topics of interest include:

Design Methodology
Low-Power Design
High-speed Techniques
Physical Design
Synchronization and Seft-timed Systems
Dynamic and run-time reconfiguration
Reconfigurable embedded systems
Field-programmable analogue arrays
Interconnects and NoCs

FPGA in Education
Roadmap of programmable logic
Teaching reconfigurable systems
History and surveys of programmable logic
Emerging device technologies
Tutorials

Platform-based Design
Embedded Processors
Custom Computers
IP Cores
Java, Handel-C, System-C

Applications
Robotics
Artificial vision
Communications/networking/cryptography
Bioinformatics
Application acceleration
Evolvable and bio-inspired applications
Rapid prototyping

Custom Computers and DSPs
Computer Arithmetics
Digital Signal Processing
Software Radio
FCCMs

EDA Tools
Logic and Architectural
Synthesis
Modelling and Simulation
Emulation
Formal Methods in System Design
CAD for reconfigurable architectures
System-level design methods
Testing, verification and benchmarking
Hardware/software co-design

Aerospace Applications
Design verification and validation
Reliability and fault tolerance
FIT rates analysis
Qualification process
Device obsolescence
High reliability processor cores
Noise, radiation effects and EMC
Experiences and lessons learned

 

 

If you need more information about SPL 2008, please send an e-mail to splconf@splconf.org and we will include you in our mailing list.

 

 

Last Update 07.11.2007